ISRO every year conducts written exam consisting of 80 questions for 90 minutes.Each question carries 3 marks and -1 for a wrong answer. Around 30,000 students appear for the exam in ECE branch out of which only 300 are called up for interview.
Download ISRO Previous year papers 2006-11 ( with answer key ).
ISRO papers for 2013 onwards are available here.
ISRO ELECTRONICS 2015 PAPER available here and answer key ! [NEW!]
Written Test was conducted on October 11th and the results of ISRO 2015-16 was published after few months(december).They have shortlisted 280 out of 28,780 under/post graduates.You can download written test results here .
SYLLABUS: (enough to get 140+ marks)
1) Communication Systems ( as in IES syllabus)
1) Communication Systems ( as in IES syllabus)
2) Microwave devices like klystron,TWTs,etc and basics of PIN diode and schottky for modulation in microwave frequencies
3) Basic Network theory and Signals. ( Gate 2016 syllabus)
4)Audio amplifiers (class A,B,AB) and other RF amplifiers (class C),also Class D,S and F (Their DC to RF efficiency).
5)Transmission lines and Waveguides ( circular as well).
6) Basics of Satellite communication ( calculating C/No ratio in downlink and uplink)
7) 8051 microcontroller simple output problems.
8)Basics of Diodes,MOSFETs,BJTs
9)Coaxial line cutoff frequency,CDMA max capacity (for given Eb/No) etc..
However, i recommend one to prepare for this exam by solving all previous year ISRO papers as some questions do repeat every year.A score of above 135 /240 is a safe bet for an interview call.
Update:
The interview for 2016-17 recruitment was conducted in FEB-MARCH for various branches.The results of the interview took around 2 months! (for ECE).
I had qualified the written test with 147 marks and came 17th among the shortlisted students in ECE.
INTERVIEW EXPERIENCE :
My interview was on february 18th at NRSC Hyderabad. In fact, there was only one interview panel in south india for electronics students and the interviews were held for a batch of around 40-50 students over feb 17-19.
The Day Before Interview:
I reached hyderabad a day before ( on 17th morning ) and stayed at Samrat Residency which is near to the interview spot.The day before i read through some analog stuff,microwave devices and my project which was again related to vlsi design(analog),I slept around 12am,expecting to wake in time for the interview on 8am.
The Day of Interview:
I reached the interview hall at 8 am.There were around 20-25 other guys present there.The staff there checked our certificates and cross checked all the details asked when we filled the application online.
In addition, there were two forms to be filled,one of which was for travel reimbursement.
The interview started sharp at 9:00 am.The first guy was in and out in 20 minutes (not bad was his feedback).The next three went in and out within just 40 minutes. I was next on list and i entered the interview hall sharp at 10:00 am.
There were around 6-8 ISRO scientists waiting to hit me with questions.I wished them and sat down.They started asking me to introduce myself.Then, they asked me to explain about my project in detail on the whiteboard (which i believe i did OK!). [ I think it took around 10 minutes].
Q1.Now,the only lady scientist in the panel asked me to compare a certain voltage (which has tolerance) with the input signal. [op amp/comparator application].
Q2.Since my project was based on VLSI design, i was given a set of specs and was asked to calculate the power dissipation in cmos.
Q3.One of the panel member suddenly poped out a question: Can we use mosfet as an inverter in subthreshold region? [ related to my project]
Q4.How do you demodulate FM ? ( the best fit was PLL method)
Q5..Difference between lock and capture range and a problem was given ,asking to calculate the capture range.
Q6. Difference between RAM and ROM.Name a few types of ROMs. (EEPROM,EAPROM (flash memory),UVPROM)
Q7.How is data erased in Flash memory (pendrives) ? ( block level) and also how do you erase electrically ? (charge accumulation in special MOS)
Q8.what is done to write a zero in EEPROM ,positive/negative current/ voltage pulse ?
Q9. A question on ADC was also asked.
Q10.What is positive and negative logic? Can you give any example of negative logic?
That's it,it was already 10:30am and i was asked to leave.
I was waitlisted by 4 in the final selection list of 49 students that came out on April 16th 2016.
You can check out the list here.
ALL THE BEST GUYS!!
1 comments:
commentsHello Sir!!!your article is very inspiring and i have a doubt that,i belong to electrical and electronics engineering stream can i apply for the electronics post?..
Reply